The waveform of a digital signal that is output by a transmitter deteriorates while being transmitted from the transmitter to a receiver via a transmission path. Therefore, a clock signal and data are required to be restored on the receiver side. A clock data restoration device for performing such restoration is disclosed in Patent Documents 1, 2, and 3, for example.
A general clock data restoration device detects the data of an input digital signal whose waveform has deteriorated at a center time of each bit period (the detected value is denoted D(n)) and at a transition time from a certain bit to the next bit (the detected value is denoted DX(n)). Further, the clock data restoration device is able to obtain the restored clock signal and data by adjusting, based on the values D(n) and value DX(n), the cycle or phase of the clock signal so that the phase difference between the input digital signal and the clock signal which indicates the timing at which these values are detected is reduced.
In addition, a clock data restoration device which comprises an equalizer section which adjusts the level of the input digital signal before outputting same is known. The equalizer section compensates for the loss which the input digital signal undergoes while being transmitted from the transmitter to the receiver via the transmission path by adjusting the level of the input digital signal. The clock data restoration device detects the value D(n) and value DX(n) from the digital signal whose level is adjusted by the equalizer section.    [Patent Document 1] Japanese Patent Application Laid-open No. H7-221800    [Patent Document 2] Published Japanese Translation No. 2004-507963 of the PCT International Publication    [Patent Document 3] Published Japanese Translation No. 2005-341582 of the PCT International Publication